A computing device may utilize an address translation mechanism, for example, in order to map references to virtual address space into physical memory resources. A hardware-based address translation mechanism may include, for example, translation tables and control registers.
A design verification system may utilize simulation-based techniques to perform functional verification of a hardware design. Unfortunately, it may be difficult to perform functional verification of an address translation mechanism included in the hardware design. For example, manual verification of a hardware design of an address translation mechanism may be time consuming and error prone, and may have narrow coverage corresponding to the few cases that are manually tested.